Altera's FPGA PCIe chaining DMA example IP core
leon.woestenberg at gmail.com
Thu Aug 28 15:21:08 UTC 2008
Hello Greg, all,
On Thu, Aug 28, 2008 at 5:35 AM, Greg KH <greg at kroah.com> wrote:
> On Mon, Aug 25, 2008 at 08:48:05PM +0200, Leon Woestenberg wrote:
>> Hello Greg,
>> could you spend some time giving out a project number for this:
> Sorry for the delay, you have number 0012.
> If there's anything I can do to help out, please let me know.
Currently we have read and write scatter/gather DMA sort-of working
(one-time only, re-init fails), but still to cache-consistent memory
and not using any of the scatter/gather interface offered by the
No interrupts are used yet, we poll for completion. Next is fixing the
re-issueing new DMAs, then enabling interrupt notification. Then make
the SG buffer be of streaming type, and do proper syncing. Using pages
mapped in user space is probably last, I think there is a new generic
scatter/gather interface in the kernel-works for this?
I suspect we may pop some questions about supporting legacy interrupts
as well as MSIs, as the PCI core can be configured for either.
I'll commence writing a wiki page on this project.
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