Altera's FPGA PCIe chaining DMA example IP core

Leon Woestenberg leon.woestenberg at gmail.com
Mon Aug 25 18:48:05 UTC 2008


Hello Greg,

could you spend some time giving out a project number for this:

On Wed, Aug 20, 2008 at 1:57 AM, Leon Woestenberg
<leon.woestenberg at gmail.com> wrote:
>
> regarding my Linux Driver project effort on a reference driver for a
> reference PCI Express core:
>
> On Mon, Aug 18, 2008 at 9:44 PM, Leon Woestenberg
> <leon.woestenberg at gmail.com> wrote:
>> On Fri, Aug 15, 2008 at 12:20 AM, Greg KH <greg at kroah.com> wrote:
>>> On Mon, Aug 04, 2008 at 12:00:58AM +0200, Leon Woestenberg wrote:
>>>> there exist an increasing number of default FPGA IP cores with a
>>>> scatter/gather DMA controller, either as a silicon core or
>>>> programmable logic core.
>>>> ...
>> It would be a common ground, or reference driver which is only
>> complete in the sense that it can perform scatter/gather DMA from
>> small on-FPGA memory to/from host (aka root complex) memory.
>>
>> If this is OK I would like to perform the project management myself,
>> in the worst case it would be a single-person effort, but at least
>> it's in the open.
>> ...
>
> I found at least one other developer interested in this, and we are
> sharing code already.
>
> Could I get a project number assigned pls?
>

Regards,
-- 
Leon



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