[PATCH v11 3/6] clk: ralink: add clock driver for mt7621 SoC

Stephen Boyd sboyd at kernel.org
Fri Apr 9 18:38:48 UTC 2021


Quoting Sergio Paracuellos (2021-04-09 11:34:35)
> On Fri, Apr 9, 2021 at 8:14 PM Stephen Boyd <sboyd at kernel.org> wrote:
> >
> > Quoting Sergio Paracuellos (2021-03-08 21:22:23)
> > > diff --git a/drivers/clk/ralink/Makefile b/drivers/clk/ralink/Makefile
> > > new file mode 100644
> > > index 000000000000..cf6f9216379d
> > > --- /dev/null
> > > +++ b/drivers/clk/ralink/Makefile
> > > @@ -0,0 +1,2 @@
[...]
> >
> > > +
> > > +               clk_hw_unregister(&sclk->hw);
> > > +       }
> > > +       return ret;
> > > +}
> > > +
> > > +static int mt7621_prepare_enable_clocks(struct clk_hw_onecell_data *clk_data)
> > > +{
> > > +       int ret, i;
> > > +
> > > +       for (i = 0; i < MT7621_CLK_MAX; i++) {
> > > +               ret = clk_prepare_enable(clk_data->hws[i]->clk);
> >
> > Are these critical clks? Why not use the CLK_IS_CRITICAL flag?
> 
> Well, Not calling clk_prepare_enable here makes the kernel to disable
> all of the stuff is not being requested. Since until now no clock
> driver existed, some SoC drivers  were not prepared for the clock. So,
> if you prefer to avoid disabling stuff using this flag I think I can
> just remove this enable_clocks function and set the flags for all the
> clocks when registering them.
> 

Ok. If they're critical clks please set the flag and add a comment
indicating why they need to be enabled all the time.


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