[PATCH 12/14] media: sunxi: Add support for the A83T MIPI CSI-2 controller

Maxime Ripard maxime at cerno.tech
Mon Oct 26 17:00:41 UTC 2020

On Fri, Oct 23, 2020 at 07:45:44PM +0200, Paul Kocialkowski wrote:
> The A83T supports MIPI CSI-2 with a composite controller, covering both the
> protocol logic and the D-PHY implementation. This controller seems to be found
> on the A83T only and probably was abandonned since.
> This implementation splits the protocol and D-PHY registers and uses the PHY
> framework internally. The D-PHY is not registered as a standalone PHY driver
> since it cannot be used with any other controller.
> There are a few notable points about the controller:
> - The initialisation sequence involes writing specific magic init values that
>   do not seem to make any particular sense given the concerned register fields.
> - Interrupts appear to be hitting regardless of the interrupt mask registers,
>   which can cause a serious flood when transmission errors occur.

Ah, so it's a separate driver too.

> This work is based on the first version of the driver submitted by
> Kévin L'hôpital, which was adapted to mainline from the Allwinner BSP.
> This version integrates MIPI CSI-2 support as a standalone V4L2 subdev
> instead of merging it in the sun6i-csi driver.
> It was tested on a Banana Pi M3 board with an OV8865 sensor in a 4-lane
> configuration.

Co-developped-by and SoB from Kevin?

Looking at the driver, the same comments from the v3s apply there

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