[PATCH v6 5/8] clk: clock-wizard: Add support for fractional support

[Stephen Boyd]

Quoting Shubhrajyoti Datta (2020-09-23 23:23:11)
> 
> > -----Original Message-----
> > From: Stephen Boyd <sboyd at kernel.org>
> > Sent: Tuesday, September 22, 2020 2:48 AM
> > > +}
> > > +
> > > +static long clk_wzrd_round_rate_f(struct clk_hw *hw, unsigned long
> > rate,
> > > +                                 unsigned long *prate) {
> > > +       return rate;
> > 
> > Can every rate be supported? This function is supposed to tell the clk
> > framework what rate will be achieved if we call clk_set_rate() with 'rate'
> > passed to this function. Almost always returning 'rate' is not the case.
> > 
> 
> We can support rate upto 3 decimal places to prevent truncation here we are 
> Returning rate.

So all rates can be supported?

> > > @@ -413,8 +543,18 @@ static int clk_wzrd_probe(struct platform_device
> > *pdev)
> > >                         ret = -EINVAL;
> > >                         goto err_rm_int_clks;
> > >                 }
> > > -               clk_wzrd->clkout[i] = clk_wzrd_register_divider(&pdev->dev,
> > > -                                                               clkout_name,
> > > +               if (!i)
> > > +                       clk_wzrd->clkout[i] = clk_wzrd_register_divf
> > > +                               (&pdev->dev, clkout_name,
> > > +                               clk_name, 0,
> > > +                               clk_wzrd->base, (WZRD_CLK_CFG_REG(2) + i * 12),
> > > +                               WZRD_CLKOUT_DIVIDE_SHIFT,
> > > +                               WZRD_CLKOUT_DIVIDE_WIDTH,
> > > +                               CLK_DIVIDER_ONE_BASED |
> > CLK_DIVIDER_ALLOW_ZERO,
> > > +                               NULL, &clkwzrd_lock);
> > > +               else
> > > +                       clk_wzrd->clkout[i] = clk_wzrd_register_divider
> > > +                               (&pdev->dev, clkout_name,
> > >                                 clk_name, 0,
> > >                                 clk_wzrd->base, (WZRD_CLK_CFG_REG(2) + i * 12),
> > >                                 WZRD_CLKOUT_DIVIDE_SHIFT,
> > >
> > 
> > I wonder if a do-while loop with flags set to ONE_BASED and ALLOW_ZERO
> > could work and then flags gets overwritten to be just DIVIDE_SHIFT? Then
> > we don't have to duplicate the registration line.
> 
> I did not understand this comment in one case I am registering  for the fractional operations
> In another we are using the integral operations

Yes and the case depends on the value of i being zero or non-zero. So
can it be converted to a do while loop and the if condition dropped?