[PATCH v1] staging: intel-dpa: gswip: Introduce Gigabit Ethernet Switch (GSWIP) device driver

[Greg KH]

On Mon, Nov 04, 2019 at 07:22:20PM +0800, Jack Ping CHNG wrote:
> This driver enables the Intel's LGM SoC GSWIP block.
> GSWIP is a core module tailored for L2/L3/L4+ data plane and QoS functions.
> It allows CPUs and other accelerators connected to the SoC datapath
> to enqueue and dequeue packets through DMAs.
> Most configuration values are stored in tables such as
> Parsing and Classification Engine tables, Buffer Manager tables and
> Pseudo MAC tables.

Why is this being submitted to staging?  What is wrong with the "real"
part of the kernel for this?

Your TODO file is really vague, and doesn't give anyone any real things
to work on with you, which is odd.

> Signed-off-by: Jack Ping CHNG <jack.ping.chng at intel.com>
> Signed-off-by: Amireddy Mallikarjuna reddy <mallikarjunax.reddy at linux.intel.com>

There is a group of people within Intel that you have to get code
reviewed by before you can send it to me.  Please go by that process and
not try to circumvent it by dumping it on staging without that review.
It is there for good reasons.

greg k-h