[PATCH v2 0/7] staging: mt7621-pci: some fixes after test previous series

[Sergio Paracuellos]

On Sat, Nov 24, 2018 at 9:05 PM NeilBrown <neil at brown.name> wrote:
>
> On Sat, Nov 24 2018, Sergio Paracuellos wrote:
>
> > Previous cleanup series was added to the staging tree without any
> > testing. After get testing feedback some issues appear and this patch
> > series should make the driver works properly again.
> >
> > Previous series are here:
> > * http://driverdev.linuxdriverproject.org/pipermail/driverdev-devel/2018-November/128200.html
> >
> > Feedback after testing from Neil Brown is here:
> > * http://driverdev.linuxdriverproject.org/pipermail/driverdev-devel/2018-November/129031.html
> >
> > There is one issue with chip revision and reset lines where those
> > are inverted. I achieve this including some wrappers for checking
> > the version in driver code and use proper reset_control_* functions.
> > I checked the 'arch/mips/ralink/reset.c' and think a good way to add
> > a quirk there but I ended up handling those inside the driver.
> >
> > Changes in v2:
> >     - PATCH 7: In commit message: 's/mt7621-pcie/mt7621-pci/g'
> >
> > Hope this helps.
> >
> > Best regards,
> >     Sergio Paracuellos
> >
> > Sergio Paracuellos (7):
> >   staging: mt7621-pci: avoid mapping sysctls registers
> >   staging: mt7621-dts: remove sysctl registers from pcie bindings
> >   staging: mt7621-pci: dt-bindings: update bindings doc removing sysctls
> >     registers
> >   staging: mt7621-pci: fix reset lines for each pcie port
> >   staging: mt7621-pci: avoid using clk_* operations
>
> all above:
>    Tested-by: NeilBrown <neil at brown.name>
>
> Thanks!
>
> >   staging: mt7621-dts: remove clocks for pcie bindings
> >   staging: mt7621-pci: dt-bindings: update bindings doc removing clocks
>
> I don't think we really want these - at least, not yet.
> The clock numbers do appear in the driver as
>
> #define PCIE_PORT_CLK_EN(x)             BIT(24 + (x))
>
> and
>                 rt_sysc_m32(PCIE_PORT_CLK_EN(slot), 0, RALINK_CLKCFG1);
> Maybe that can be made generic...
>
> It is odd that the driver disables the clock, but never enables it.
> There is other clock-related code in the pci driver.  Maybe it should
> just stay there, maybe it should go to a clock driver.  I don't really
> know.  But this dts stuff "looks" right, so I'd rather leave it until we
> know that it will be useless.

Ok! I understand your point. Because those are the last two in the series, I
think there is no need to send v3 of this series without them. Greg, let me know
if you prefer me to send v3 without last two patches.

> Thanks,
> NeilBrown

Thanks to you for testing this.

Best regards,
    Sergio Paracuellos
>
>
>
>
> >
> >  drivers/staging/mt7621-dts/mt7621.dtsi        |  5 +-
> >  .../mt7621-pci/mediatek,mt7621-pci.txt        |  9 +--
> >  drivers/staging/mt7621-pci/pci-mt7621.c       | 67 +++++++++----------
> >  3 files changed, 34 insertions(+), 47 deletions(-)
> >
> > --
> > 2.19.1