[PATCH v2 0/7] staging: mt7621-pci: some fixes after test previous series

Sergio Paracuellos sergio.paracuellos at gmail.com
Sat Nov 24 17:54:50 UTC 2018


Previous cleanup series was added to the staging tree without any
testing. After get testing feedback some issues appear and this patch
series should make the driver works properly again.

Previous series are here:
* http://driverdev.linuxdriverproject.org/pipermail/driverdev-devel/2018-November/128200.html

Feedback after testing from Neil Brown is here:
* http://driverdev.linuxdriverproject.org/pipermail/driverdev-devel/2018-November/129031.html

There is one issue with chip revision and reset lines where those
are inverted. I achieve this including some wrappers for checking
the version in driver code and use proper reset_control_* functions.
I checked the 'arch/mips/ralink/reset.c' and think a good way to add
a quirk there but I ended up handling those inside the driver.

Changes in v2:
    - PATCH 7: In commit message: 's/mt7621-pcie/mt7621-pci/g'

Hope this helps.

Best regards,
    Sergio Paracuellos

Sergio Paracuellos (7):
  staging: mt7621-pci: avoid mapping sysctls registers
  staging: mt7621-dts: remove sysctl registers from pcie bindings
  staging: mt7621-pci: dt-bindings: update bindings doc removing sysctls
    registers
  staging: mt7621-pci: fix reset lines for each pcie port
  staging: mt7621-pci: avoid using clk_* operations
  staging: mt7621-dts: remove clocks for pcie bindings
  staging: mt7621-pci: dt-bindings: update bindings doc removing clocks

 drivers/staging/mt7621-dts/mt7621.dtsi        |  5 +-
 .../mt7621-pci/mediatek,mt7621-pci.txt        |  9 +--
 drivers/staging/mt7621-pci/pci-mt7621.c       | 67 +++++++++----------
 3 files changed, 34 insertions(+), 47 deletions(-)

-- 
2.19.1



More information about the devel mailing list