[PATCH v6 33/33] staging: mt7621-pci: replace 'mdelay()' with 'msleep()'
fransklaver at gmail.com
Mon Nov 5 08:09:39 UTC 2018
On Sun, Nov 4, 2018 at 11:51 AM Sergio Paracuellos
<sergio.paracuellos at gmail.com> wrote:
> Function 'mt7621_pcie_init_ports' is never called in atomic context.
> It calls mdelay() to busily wait, which is not necessary. mdelay()
> can be replaced with msleep().
> Signed-off-by: Sergio Paracuellos <sergio.paracuellos at gmail.com>
> drivers/staging/mt7621-pci/pci-mt7621.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c
> index fb9aa6b..14cec23 100644
> --- a/drivers/staging/mt7621-pci/pci-mt7621.c
> +++ b/drivers/staging/mt7621-pci/pci-mt7621.c
> @@ -632,7 +632,7 @@ static void mt7621_pcie_init_ports(struct mt7621_pcie *pcie)
> rt_sysc_m32(PCIE_CLK_GEN_EN, PCIE_CLK_GEN_DIS, RALINK_PCIE_CLK_GEN);
> rt_sysc_m32(PCIE_CLK_GEN1_DIS, PCIE_CLK_GEN1_EN, RALINK_PCIE_CLK_GEN1);
> rt_sysc_m32(PCIE_CLK_GEN_DIS, PCIE_CLK_GEN_EN, RALINK_PCIE_CLK_GEN);
> - mdelay(50);
> + msleep(50);
> rt_sysc_m32(RALINK_PCIE_RST, 0, RALINK_RSTCTRL);
>From a software point of view it makes sense to remove the busy-wait.
>From a hardware perspective it may still make sense to keep it. Can
you guarantee that the PCIE_RST is done at the correct time. I haven't
looked thoroughly at the datasheet yet, but I can imagine the level
has to shift within a certain time frame? Or doesn't that make too
much of a difference? Perhaps mention that in your commit message?
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