[PATCH char-misc 1/2] Drivers: hv: vmbus: Remove x86 MSR refs in arch independent code

[KY Srinivasan]

> -----Original Message-----
> From: mhkelley58 at gmail.com <mhkelley58 at gmail.com>
> Sent: Tuesday, May 8, 2018 8:38 AM
> To: gregkh at linuxfoundation.org; linux-kernel at vger.kernel.org;
> devel at linuxdriverproject.org; olaf at aepfle.de; apw at canonical.com;
> vkuznets at redhat.com; jasowang at redhat.com;
> leann.ogasawara at canonical.com; marcelo.cerri at canonical.com; Stephen
> Hemminger <sthemmin at microsoft.com>; KY Srinivasan
> <kys at microsoft.com>
> Subject: [PATCH char-misc 1/2] Drivers: hv: vmbus: Remove x86 MSR refs in
> arch independent code
> 
> From: Michael Kelley <mikelley at microsoft.com>
> 
> In architecture independent code for manipulating Hyper-V synthetic timers
> and synthetic interrupts, pass in an ordinal number identifying the timer
> or interrupt, rather than an actual MSR register address.  Then in
> x86/x64 specific code, map the ordinal number to the appropriate MSR.
> This change facilitates the introduction of an ARM64 version of Hyper-V,
> which uses the same synthetic timers and interrupts, but a different
> mechanism for accessing them.
> 
> Signed-off-by: Michael Kelley <mikelley at microsoft.com>
> ---
>  arch/x86/include/asm/mshyperv.h | 12 ++++++++----
>  drivers/hv/hv.c                 | 20 ++++++++------------
>  2 files changed, 16 insertions(+), 16 deletions(-)
> 
> diff --git a/arch/x86/include/asm/mshyperv.h
> b/arch/x86/include/asm/mshyperv.h
> index b90e796..caf9035 100644
> --- a/arch/x86/include/asm/mshyperv.h
> +++ b/arch/x86/include/asm/mshyperv.h
> @@ -75,8 +75,10 @@ static inline void vmbus_signal_eom(struct
> hv_message *msg, u32 old_msg_type)
>  	}
>  }
> 
> -#define hv_init_timer(timer, tick) wrmsrl(timer, tick)
> -#define hv_init_timer_config(config, val) wrmsrl(config, val)
> +#define hv_init_timer(timer, tick) \
> +	wrmsrl(HV_X64_MSR_STIMER0_COUNT + (2*timer), tick)
> +#define hv_init_timer_config(timer, val) \
> +	wrmsrl(HV_X64_MSR_STIMER0_CONFIG + (2*timer), val)
Why are we stepping in units of 2?

K. Y