[PATCH v3 04/23] staging: mt7621-pci: reimplement pci_config_[read|write] functions
Sergio Paracuellos
sergio.paracuellos at gmail.com
Mon Jul 9 20:21:06 UTC 2018
The logic for this functions is kind of mess calling to other
functions which ends up in using very ugly macros. Reimplement
this two using kernel write[b,w,l] and read[b,w,l] and the variable
'mt7621_pci_base'. Function prototypes have changed style to avoid
long lines.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos at gmail.com>
---
drivers/staging/mt7621-pci/pci-mt7621.c | 54 +++++++++++++++++++++++++++------
1 file changed, 44 insertions(+), 10 deletions(-)
diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c
index b745423..122c046 100644
--- a/drivers/staging/mt7621-pci/pci-mt7621.c
+++ b/drivers/staging/mt7621-pci/pci-mt7621.c
@@ -273,29 +273,63 @@ write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val)
}
static int
-pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
+pci_config_read(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 *val)
{
+ u32 address_reg, data_reg;
+ u32 address;
+
+ address_reg = RALINK_PCI_CONFIG_ADDR;
+ data_reg = RALINK_PCI_CONFIG_DATA_VIRTUAL_REG;
+
+ address = mt7621_pci_get_cfgaddr(bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where);
+
+ writel(address, mt7621_pci_base + address_reg);
+
switch (size) {
case 1:
- return read_config_byte(bus, devfn, where, (u8 *) val);
+ *val = readb(mt7621_pci_base + data_reg + (where & 0x3));
+ break;
case 2:
- return read_config_word(bus, devfn, where, (u16 *) val);
- default:
- return read_config_dword(bus, devfn, where, val);
+ *val = readw(mt7621_pci_base + data_reg + (where & 0x3));
+ break;
+ case 4:
+ *val = readl(mt7621_pci_base + data_reg);
+ break;
}
+
+ return PCIBIOS_SUCCESSFUL;
}
static int
-pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
+pci_config_write(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
{
+ u32 address_reg, data_reg;
+ u32 address;
+
+ address_reg = RALINK_PCI_CONFIG_ADDR;
+ data_reg = RALINK_PCI_CONFIG_DATA_VIRTUAL_REG;
+
+ address = mt7621_pci_get_cfgaddr(bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where);
+
+ writel(address, mt7621_pci_base + address_reg);
+
switch (size) {
case 1:
- return write_config_byte(bus, devfn, where, (u8) val);
+ writeb((u8)val, mt7621_pci_base + data_reg + (where & 0x3));
+ break;
case 2:
- return write_config_word(bus, devfn, where, (u16) val);
- default:
- return write_config_dword(bus, devfn, where, val);
+ writew((u16)val, mt7621_pci_base + data_reg + (where & 0x3));
+ break;
+ case 4:
+ writel(val, mt7621_pci_base + data_reg);
+ break;
}
+
+ return PCIBIOS_SUCCESSFUL;
}
struct pci_ops mt7621_pci_ops = {
--
2.7.4
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