[PATCH v3 2/2] staging: mt7621-spi: drop support for SPI mode 1/2/3

[Chuanhong Guo]

As explained in previous patch, this SPI controller seems to be
tested on SPI flash only before mass production and some bits are
swizzled under other SPI modes probably due to incorrect wiring
inside the silicon. Drop implementation of SPI mode 1/2/3 since
they are broken.

Also drop RT2880_SPI_MODE_BITS macro because we now have only
SPI_LSB_FIRST implemented and the mode_bits is so short that we
don't need a macro there.

Signed-off-by: Chuanhong Guo <gch981213 at gmail.com>
---
Change since v2:
 fixed the following checkpatch.pl complaining:
CHECK: Please don't use multiple blank lines
#45: FILE: drivers/staging/mt7621-spi/spi-mt7621.c:136:
 
+

Changes since v1:
 drop unspoorted modes from mode_bits instead of reject them
  in mt7621_spi_prepare.
 dropped RT2880_SPI_MODES_BITS macro
 modified code comment

 drivers/staging/mt7621-spi/spi-mt7621.c | 24 +++++++-----------------
 1 file changed, 7 insertions(+), 17 deletions(-)

diff --git a/drivers/staging/mt7621-spi/spi-mt7621.c b/drivers/staging/mt7621-spi/spi-mt7621.c
index a69293d43281..513b6e79b985 100644
--- a/drivers/staging/mt7621-spi/spi-mt7621.c
+++ b/drivers/staging/mt7621-spi/spi-mt7621.c
@@ -55,9 +55,6 @@
 #define MT7621_CPOL		BIT(4)
 #define MT7621_LSB_FIRST	BIT(3)
 
-#define RT2880_SPI_MODE_BITS	(SPI_CPOL | SPI_CPHA |		\
-				 SPI_LSB_FIRST | SPI_CS_HIGH)
-
 struct mt7621_spi;
 
 struct mt7621_spi {
@@ -136,20 +133,13 @@ static int mt7621_spi_prepare(struct spi_device *spi, unsigned int speed)
 	if (spi->mode & SPI_LSB_FIRST)
 		reg |= MT7621_LSB_FIRST;
 
+	/* This SPI controller seems to be tested on SPI flash only
+	 * and some bits are swizzled under other SPI modes probably
+	 * due to incorrect wiring inside the silicon. Only mode 0
+	 * works correctly.
+	 */
 	reg &= ~(MT7621_CPHA | MT7621_CPOL);
-	switch (spi->mode & (SPI_CPOL | SPI_CPHA)) {
-	case SPI_MODE_0:
-		break;
-	case SPI_MODE_1:
-		reg |= MT7621_CPHA;
-		break;
-	case SPI_MODE_2:
-		reg |= MT7621_CPOL;
-		break;
-	case SPI_MODE_3:
-		reg |= MT7621_CPOL | MT7621_CPHA;
-		break;
-	}
+
 	mt7621_spi_write(rs, MT7621_SPI_MASTER, reg);
 
 	return 0;
@@ -368,7 +358,7 @@ static int mt7621_spi_probe(struct platform_device *pdev)
 		return -ENOMEM;
 	}
 
-	master->mode_bits = RT2880_SPI_MODE_BITS;
+	master->mode_bits = SPI_LSB_FIRST;
 
 	master->setup = mt7621_spi_setup;
 	master->transfer_one_message = mt7621_spi_transfer_one_message;
-- 
2.19.1