[PATCH v2 12/20] staging: mt7621-pci: rewrite pcie phy related functions
Sergio Paracuellos
sergio.paracuellos at gmail.com
Tue Aug 14 11:56:21 UTC 2018
On Tue, Aug 14, 2018 at 12:51 PM, Dan Carpenter
<dan.carpenter at oracle.com> wrote:
> On Sun, Aug 12, 2018 at 08:45:57PM +0200, Sergio Paracuellos wrote:
>> @@ -561,15 +660,13 @@ static int mt7621_pci_probe(struct platform_device *pdev)
>>
>> mdelay(100);
>>
>> - list_for_each_entry_safe(port, tmp, &pcie->ports, list)
>> - mt7621_pcie_enable_port(port);
>> -
>> - if ((*(unsigned int *)(0xbe00000c)&0xFFFF) == 0x0101) // MT7621 E2
>> - bypass_pipe_rst(pcie);
>> - set_phy_for_ssc(pcie);
>> -
>> list_for_each_entry_safe(port, tmp, &pcie->ports, list) {
>> u32 slot = port->slot;
>> +
>> + mt7621_pcie_enable_port(port);
>> + if ((*(unsigned int *)(0xbe00000c)&0xFFFF) == 0x0101) // MT7621 E2
>> + bypass_pipe_rst(port);
>> + set_phy_for_ssc(port);
> ^^^^
> This is a use after free. Bugs like this are why we discourage layering
> violations.
>
True. Thanks for pointing this out. Will be fixed after this changes are tested.
> regards,
> dan carpenter
>
Best regards,
Sergio Paracuellos
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