[PATCH 1/6] staging: comedi: addi_apci_1564: clarify change-of-state interrupt support

[Ian Abbott]

On 06/06/16 20:51, Hartley Sweeten wrote:
> On Monday, June 06, 2016 12:33 PM, Ian Abbott wrote:
>> Okay, I think I must have got something inverted in my head at the time
>> I wrote my reply.
>>
>> Follow-up question: when you do:
>>
>> 		s->state = inl(dev->iobase + APCI1564_DI_INT_STATUS_REG);
>>
>> should that be ANDed with something (possibly
>> APCI1564_DI_INT_MODE_MASK), or are the other bits (including the new
>> "event" bits) guaranteed to read zero?
>
> I guess it could be ANDed with APCI1564_DI_INT_MODE_MASK for
> completeness.
>
> The datasheet from ADDI-DATA shows this information for the register:
>
> Address + 0x10
>    Write: Nicht benutzt			(English translation: unused)
>    Read: Status Register 4 to 19
>      Interrupt Status 4 to 19
>      0: No Interrupt
>      1: Interrupt generated
>
>  From that I assume that the other bits will always return 0.

Since it doesn't explicitly sat the other bits return 0, and until 
someone can confirm, I think it's better not to assume that.

-- 
-=( Ian Abbott @ MEV Ltd.    E-mail: <abbotti at mev.co.uk> )=-
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