[PATCH 19/22] staging: comedi: adv_pci1710: fix counter 0 internal clock source

[Ian Abbott]

On 04/11/15 16:55, H Hartley Sweeten wrote:
> Counters 1 and 2 of the 8254 are cascaeded to create the 32-bit timer
> used for the analog input pacer trigger. The base clock to these counters
> is 10 MHz.
>
> Counter 0 is available to the user for general purpose use. This counter
> can use either an internal 1 MHz clock or an external clock. The
> (*insn_config) for the counter subdevice provides support for
> INSN_CONFIG_{SET,GET}_CLOCK_SRC to allow the user to select the
> clock source to use. Fix the INSN_CONFIG_GET_CLOCK_SRC so it returns
> the correct speed of the internal clock.
>
> Signed-off-by: H Hartley Sweeten <hsweeten at visionengravers.com>
> Cc: Ian Abbott <abbotti at mev.co.uk>
> Cc: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
> ---
>   drivers/staging/comedi/drivers/adv_pci1710.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/staging/comedi/drivers/adv_pci1710.c b/drivers/staging/comedi/drivers/adv_pci1710.c
> index c5f8bff..9e45f3d 100644
> --- a/drivers/staging/comedi/drivers/adv_pci1710.c
> +++ b/drivers/staging/comedi/drivers/adv_pci1710.c
> @@ -701,7 +701,7 @@ static int pci1710_counter_insn_config(struct comedi_device *dev,
>   			data[2] = 0;
>   		} else {
>   			data[1] = 0;
> -			data[2] = I8254_OSC_BASE_10MHZ;
> +			data[2] = I8254_OSC_BASE_1MHZ;
>   		}
>   		break;
>   	default:
>

The manual I have says it's 1 MHz for PCI-1711/1711L/1716/1716L,
and 100 kHz for PCI-1710/1710L/1710HG/1710HGL.

-- 
-=( Ian Abbott @ MEV Ltd.    E-mail: <abbotti at mev.co.uk> )=-
-=(                          Web: http://www.mev.co.uk/  )=-