[PATCH 013/107] staging: comedi: ni_stc.h: tidy up NI_M_PLL_STATUS_REG bits
H Hartley Sweeten
hsweeten at visionengravers.com
Fri May 1 21:58:38 UTC 2015
Rename the CamelCase and convert the enum into defines. Use the BIT()
macro to define the bits.
Signed-off-by: H Hartley Sweeten <hsweeten at visionengravers.com>
Cc: Ian Abbott <abbotti at mev.co.uk>
Cc: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
---
drivers/staging/comedi/drivers/ni_mio_common.c | 2 +-
drivers/staging/comedi/drivers/ni_stc.h | 5 +----
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c
index 0a1f92e..bb4fde0 100644
--- a/drivers/staging/comedi/drivers/ni_mio_common.c
+++ b/drivers/staging/comedi/drivers/ni_mio_common.c
@@ -4740,7 +4740,7 @@ static int ni_mseries_set_pll_master_clock(struct comedi_device *dev,
devpriv->clock_source = source;
/* it seems to typically take a few hundred microseconds for PLL to lock */
for (i = 0; i < timeout; ++i) {
- if (ni_readw(dev, NI_M_PLL_STATUS_REG) & MSeries_PLL_Locked_Bit)
+ if (ni_readw(dev, NI_M_PLL_STATUS_REG) & NI_M_PLL_STATUS_LOCKED)
break;
udelay(1);
}
diff --git a/drivers/staging/comedi/drivers/ni_stc.h b/drivers/staging/comedi/drivers/ni_stc.h
index f08124e..ffed5a1 100644
--- a/drivers/staging/comedi/drivers/ni_stc.h
+++ b/drivers/staging/comedi/drivers/ni_stc.h
@@ -991,6 +991,7 @@ static const struct comedi_lrange range_ni_E_ao_ext;
#define NI_M_PLL_MAX_MULTIPLIER 0x100
#define NI_M_PLL_CTRL_MULTIPLIER(x) (((x) & 0xff) << 0)
#define NI_M_PLL_STATUS_REG 0x1c8
+#define NI_M_PLL_STATUS_LOCKED BIT(0)
#define NI_M_PFI_OUT_SEL_REG(x) (0x1d0 + ((x) * 2))
#define NI_M_PFI_DI_REG 0x1dc
#define NI_M_PFI_DO_REG 0x1de
@@ -1007,10 +1008,6 @@ static const struct comedi_lrange range_ni_E_ao_ext;
#define NI_M_STATIC_AI_CTRL_REG(x) ((x) ? (0x260 + (x)) : 0x064)
#define NI_M_AO_REF_ATTENUATION_REG(x) (0x264 + (x))
-enum MSeries_PLL_Status {
- MSeries_PLL_Locked_Bit = 0x1
-};
-
enum MSeries_AI_Config_FIFO_Bypass_Bits {
MSeries_AI_Bypass_Channel_Mask = 0x7,
MSeries_AI_Bypass_Bank_Mask = 0x78,
--
2.3.0
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