[PATCH v2 1/2] staging: rtl8723au: core: avoid bitwise arithmetic with forced endianness

Dan Carpenter dan.carpenter at oracle.com
Sun Jun 7 11:20:19 UTC 2015


You're CC'ing all the lustre people on this by mistake.

Can we find which patch introduced this bug, and add a Fixes: tag and
CC whoever introduced it?

Please, resend with the correct CC list.

regards,
dan carpenter



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