[PATCH 2/6] staging: comedi: ni_stc.h: cleanup ni_e_series_enable_second_irq()

[H Hartley Sweeten]

This function is used to enable/disable the second irq on NI e-series
boards. This irq used used to generate dma requests for the counters.

There are only 2 counters (NUM_GPCT) so the default case of the switch
can never occur.

Tidy up this function and remove the unreachable BUG().

Signed-off-by: H Hartley Sweeten <hsweeten at visionengravers.com>
Cc: Ian Abbott <abbotti at mev.co.uk>
Cc: Greg Kroah-Hartman <gregk at linuxfoundation.org>
---
 drivers/staging/comedi/drivers/ni_mio_common.c | 41 +++++++++++---------------
 1 file changed, 17 insertions(+), 24 deletions(-)

diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c
index 6da1424..aa1ee96 100644
--- a/drivers/staging/comedi/drivers/ni_mio_common.c
+++ b/drivers/staging/comedi/drivers/ni_mio_common.c
@@ -527,38 +527,31 @@ static void ni_release_cdo_mite_channel(struct comedi_device *dev)
 #endif /*  PCIDMA */
 }
 
-/* e-series boards use the second irq signals to generate dma requests for their counters */
 #ifdef PCIDMA
 static void ni_e_series_enable_second_irq(struct comedi_device *dev,
 					  unsigned gpct_index, short enable)
 {
 	struct ni_private *devpriv = dev->private;
+	uint16_t val = 0;
+	int reg;
 
-	if (devpriv->is_m_series)
+	if (devpriv->is_m_series || gpct_index > 1)
 		return;
-	switch (gpct_index) {
-	case 0:
-		if (enable) {
-			devpriv->stc_writew(dev, G0_Gate_Second_Irq_Enable,
-					    Second_IRQ_A_Enable_Register);
-		} else {
-			devpriv->stc_writew(dev, 0,
-					    Second_IRQ_A_Enable_Register);
-		}
-		break;
-	case 1:
-		if (enable) {
-			devpriv->stc_writew(dev, G1_Gate_Second_Irq_Enable,
-					    Second_IRQ_B_Enable_Register);
-		} else {
-			devpriv->stc_writew(dev, 0,
-					    Second_IRQ_B_Enable_Register);
-		}
-		break;
-	default:
-		BUG();
-		break;
+
+	/*
+	 * e-series boards use the second irq signals to generate
+	 * dma requests for their counters
+	 */
+	if (gpct_index == 0) {
+		reg = Second_IRQ_A_Enable_Register;
+		if (enable)
+			val = G0_Gate_Second_Irq_Enable;
+	} else {
+		reg = Second_IRQ_B_Enable_Register;
+		if (enable)
+			val = G1_Gate_Second_Irq_Enable;
 	}
+	devpriv->stc_writew(dev, val, reg);
 }
 #endif /*  PCIDMA */
 
-- 
1.9.3