[PATCH v5 4/6] staging: fpga manager: add driver for socfpga fpga manager

Michal Simek michal.simek at xilinx.com
Fri Dec 19 07:30:53 UTC 2014


On 12/18/2014 09:59 PM, atull wrote:
> On Thu, 18 Dec 2014, Michal Simek wrote:
> 
> Hi Michal,
> 
>>> +
>>> +	/* Write out remaining non 32-bit chunks. */
>>> +	switch (count) {
>>> +	case 3:
>>> +		socfpga_fpga_data_writel(priv, buffer_32[i++] & 0x00ffffff);
>>> +		break;
>>> +	case 2:
>>> +		socfpga_fpga_data_writel(priv, buffer_32[i++] & 0x0000ffff);
>>> +		break;
>>> +	case 1:
>>> +		socfpga_fpga_data_writel(priv, buffer_32[i++] & 0x000000ff);
>>> +		break;
>>> +	default:
>>> +		/* This will never happen. */
>>
>> why not just return any error code here even if this can't happen.
>>
> 
> OK. Will be in v6.
> 
>>
>> add it to one line.
>>
>> The rest is looks good to me. I think this is good to go in.
>>
>> Acked-by: Michal Simek <michal.simek at xilinx.com>
>>
>> Thanks,
>> Michal
>>
> 
> Thanks for the feedback.  So patches 1-4 look good now?

Will look at them.

M



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