[PATCH 4/6] staging: xillybus: Removed write memory barriers before wait_event_*()
Eli Billauer
eli.billauer at gmail.com
Sat Aug 16 15:57:59 UTC 2014
According to Documentation/memory-barriers.txt, a memory barrier is put
in place by wait_event_*()
Signed-off-by: Eli Billauer <eli.billauer at gmail.com>
---
drivers/staging/xillybus/xillybus_core.c | 5 +----
1 files changed, 1 insertions(+), 4 deletions(-)
diff --git a/drivers/staging/xillybus/xillybus_core.c b/drivers/staging/xillybus/xillybus_core.c
index bee58a2..f48e4de 100644
--- a/drivers/staging/xillybus/xillybus_core.c
+++ b/drivers/staging/xillybus/xillybus_core.c
@@ -634,7 +634,6 @@ static int xilly_obtain_idt(struct xilly_endpoint *endpoint)
channel = endpoint->channels[1]; /* This should be generated ad-hoc */
channel->wr_sleepy = 1;
- wmb(); /* Setting wr_sleepy must come before the command */
iowrite32(1 |
(3 << 24), /* Opcode 3 for channel 0 = Send IDT */
@@ -1968,7 +1967,7 @@ EXPORT_SYMBOL(xillybus_init_endpoint);
static int xilly_quiesce(struct xilly_endpoint *endpoint)
{
endpoint->idtlen = -1;
- wmb(); /* Make sure idtlen is set before sending command */
+
iowrite32((u32) (endpoint->dma_using_dac & 0x0001),
endpoint->registers + fpga_dma_control_reg);
@@ -2029,8 +2028,6 @@ int xillybus_endpoint_discovery(struct xilly_endpoint *endpoint)
endpoint->idtlen = -1;
- smp_wmb();
-
/*
* Set DMA 32/64 bit mode, quiesce the device (?!) and get IDT
* buffer size.
--
1.7.2.3
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