[PATCH 1/2] staging: tidspbridge: fix breakages due to CM reorganization

Omar Ramirez Luna omar.ramirez at copitl.com
Mon Dec 24 14:10:24 UTC 2012

3.8-rc1 introduced changes in the clock management header files,
this resulted in compilation breakages for this driver.

Define this locally while APIs are made available, given that driver
code shouldn't include mach header files.

This fixes:
drivers/staging/tidspbridge/core/tiomap3430.c:550:13: error:
'OMAP3430_CM_AUTOIDLE_PLL' undeclared (first use in this function)
drivers/staging/tidspbridge/core/tiomap_io.c:416:13: error:
'OMAP3430_CM_CLKEN_PLL' undeclared (first use in this function)

Reported-by: Chen Gang <gang.chen at asianux.com>
Signed-off-by: Omar Ramirez Luna <omar.ramirez at copitl.com>
 drivers/staging/tidspbridge/core/_tiomap.h |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/drivers/staging/tidspbridge/core/_tiomap.h b/drivers/staging/tidspbridge/core/_tiomap.h
index 543a127..61ea135 100644
--- a/drivers/staging/tidspbridge/core/_tiomap.h
+++ b/drivers/staging/tidspbridge/core/_tiomap.h
@@ -40,6 +40,14 @@
 #include <dspbridge/sync.h>
 #include <dspbridge/clk.h>
+ * XXX These mach-omap2/ defines are wrong and should be removed.  No
+ * driver should read or write to PRM/CM registers directly; they
+ * should rely on OMAP core code to do this.
+ */
+#define OMAP3430_CM_AUTOIDLE_PLL	0x0034
+#define OMAP3430_CM_CLKEN_PLL		0x0004
 struct map_l4_peripheral {
 	u32 phys_addr;
 	u32 dsp_virt_addr;

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